利用可编程器件设计移位寄存器

Replacement Register Design by PLD

随着科学技术的发展 ,特别是微电子技术和计算机技术的发展 ,数字逻辑电路的实验手段也不断得到更新、完善和发展。从 80年代中期开始 ,可编程逻辑器件 (PLD)的出现让人们告别了在印刷电路板上拼凑大规模电路的时代。由于可编程逻辑器件与分立逻辑器件相比较具有速度快、容量大、功耗低、可靠性高等众多优点 ,因此被广泛用来取代分立元件逻辑实验。本文介绍一种利用可编程器件设计四位环形移位寄存器的方法。

With the development of science and technology, especially the development of the microelectron technology and the computer technolgy, the experiment methods of the figure logic circuit irenew, perfect and develop continuously. Since the middle of the 80's,because of the PLD appearance the people bid farewell the age of the scraping the big scale circuit on the printing circuit board of the big area. Because the PLD compare with the separative logic device has lots of advantages,such as quick speed, large capacity, low wastage and hige reliable,so it use to replace the seperative logic device experiment widespreadly. This paper introduces a kind of method which uses PLD to design the four bites cycle replacement register.