流水线结构模数转换器电容的误差平均技术

Capacitor error averaging technique for pipelined ADCs

电容误差平均技术是一种本质线性(inherentlylinear)的流水线模数转换电容失配校准技术,但其性能指数(分辨率×速度与功耗×面积之比)并不理想。为了提高性能指数,该文提出了一种改进的电容误差平均技术。该技术利用跨导运算放大器(OTA)的端口交换操作和双采样的误差平均功能来完成OTA失调的抵消,不需要采样相中的OTA单位增益状态,从而一方面加快了建立速度,另一方面使得相邻级可共享OTA,减少了功耗和面积。电路分析和MATLAB软件仿真表明,在两种典型的情况下,改进的方法能将速度提高14%(OTA为开关电容共模反馈)和23%(OTA为非开关电容共模反馈);而且由于OTA可共享,模数转换器(ADC)的功耗可降低近一半。改进的技术更适用于高速高精度及连续工作的应用场合。

Capacitor error averaging is an inherently linear capacitor mismatch calibration technique for pipelined analogtodigital conversion, but its conversion is not very efficient. An improved capacitor error averaging technique was developed to make the conversion more efficient. An operational transconductance amplifier (OTA) offset cancellation scheme based on OTA terminal exchange and error averaging was adopted to avoid the need to connect the OTA in unity gain feedback at the sampling phase time. Thus the settling speed is improved and the power dissipation and chip size are reduced by sharing the OTA between adjacent stages. Circuit analysis and MATLAB simulation indicate that the speed can be typically improved by 14% when the OTA uses a switchedcapacitor commonmode feedback and by 23% when it does not, and the power dissipation can be reduced by nearly a half. The improved technique is ideal for highspeed, highresolution, continuous operation.