摘要
对金属钨淀积工艺中温度对形貌和电学性质的影响进行研究,通过比较450℃和425℃金属钨化学汽相淀积工艺的差异,发现425℃下淀积的金属钨薄膜的方块电阻和标准偏差都略高于450℃下生长的金属钨薄膜。425℃工艺条件淀积的金属钨的通孔电阻高于450℃W条件下的接触电阻。从FIB结果看,425℃和450℃钨沉积均有发现空洞,450℃工艺条件下沉积的金属钨形成的接触孔空洞比425℃形成的空洞略小。同时研究了金属铝后道互连工艺中的金属空洞问题,发现在SEM照片中看到的金属空洞有些是由于工艺原因造成的,有些只是因为SEM制样造成的。而HDP的温度过高是金属空洞形成的可能性之一。尝试通过电学测量数据对金属空洞进行量化,但从数据可以得出结论利用ET数据对空洞问题进行量化还是比较困难。
In this paper,the effect of the temperature of tungsten deposition process on the morphology and electrical properties was studied.By comparing the difference between 450℃and425℃tungsten chemical vapor deposition process,it was found that the square resistance and standard deviation of the tungsten film deposited at 425℃were slightly higher than those of the tungsten film grown at 450℃.The through-hole resistance of tungsten deposited at 425℃is higher than that at 450℃.According to the FIB results,both 425℃and 450℃tungsten deposits have holes.The contact hole formed by tungsten deposited at 450℃is slightly smaller than that formed by 425℃.At the same time,this paper studies the metal cavity in the process of aluminum backend interconnection process,and finds that some of the metal cavity seen in the SEM photos are caused by the process,and some are only caused by SEM sample preparation.The high temperature of HDP is one of the possibilities for the formation of metal cavities.This paper attempts to quantify the metal void through electrical measurement data,but it can be concluded from the data that it is still difficult to quantify the void problem with ET data.
作者
顾学强
GU Xueqiang(Shanghai Integrated Circuit Research and Development Center Co.,Ltd,Shanghai 201210,China)
出处
《集成电路应用》
2019年第7期37-39,共3页
Application of IC
基金
国家科技重大专题课题(2011ZX02702_004)