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基于Verilog HDL的约束MPC的FPGA硬件实现

FPGA Hardware Implementation of Model Predictive Controller Based on Verilog HDL
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摘要 为提高模型预测控制(Model Predictive Control,MPC)的在线计算性能,拓展其在快速动态系统中的实际应用,给出了一种基于Verilog硬件描述语言(Hardware Description Language,HDL)的MPC控制器的FPGA(Field Programmable Gate Array,FPGA)硬件实现方法,并采用基于惩罚函数的粒子群优化算法(Particle Swarm Optimization,PSO)用于在线求解MPC的约束优化问题。首先,通过Verilog HDL编写实现矩阵运算模块、PSO求解模块,充分利用PSO的并行搜索能力和FPGA的并行计算结构提高MPC的在线计算性能,最后进行模块综合实现基于FPGA的约束MPC控制器。以电子节气门为被控对象进行控制器的实时验证,结果表明设计的MPC-FPGA控制器能够很好地满足电子节气门的快速跟踪要求,并验证了控制器的有效性和实时性。 In order to improve the online performance and apply the model predictive control(MPC) to the fast systems in the real-word, this paper presents a field programmable gate array(FPGA) method for the hardware implementation of MPC controller based on Verilog hardware description language(HDL). This paper also adopts an optimization method based on particle swarm optimization(PSO) algorithm and penalty function to solve the constrained MPC problem. Firstly, the modules of matrix operation and PSO solver are implemented by coding Verilog HDL. The parallel searching ability of PSO and the parallel computing structure of FPGA are used to enhance the online performance of the MPC controller. Then, these modules are integrated to implement the MPC controller on the FPGA chip. Finally, the electronic throttle control system is used to evaluate the performance of the MPC controller based on FPGA. The real-time experiment results indicate that the proposed MPC-FPGA controller can satisfy the tracking requirement of the throttle, and also verify the effectiveness and real-time capability of the MPC controller.
出处 《控制工程》 CSCD 北大核心 2016年第8期1208-1214,共7页 Control Engineering of China
基金 国家自然科学基金项目(61374046) "973"国家重点基础研究发展计划项目(2012CBB821202)
关键词 模型预测控制 VERILOG HDL 现场可编程门阵列 粒子群优化算法 实时实验 Model predictive control Verilog hardware description language field programmable gate array particle swarm optimization real-time experiment
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参考文献14

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