基于FPGA的高速实时三通道脉压处理器研究

Study of the High-speed Real-time Three-channel Pulse Compression Processor Based on FPGA

脉压一直是雷达处理系统中的关键技术。本文研制了一个基于 FPGA芯片 Xc2 v5 0 0的三通道高速实时数字脉压系统。针对脉压算法的特点 ,提出了一种硬件共享的结构 ,节省了系统资源。通过硬件的并行结构加快处理速度 ,从而使系统达到能在 96 .2 3μs内完成三路 5 12点信号的脉压。用块浮点的算法改善了定点算法的精度 。

Pulse compression always is one of the most key technology in radar system. A high speed real time digital pulse compression (DPC) system is provided, which is completed by one FPGA chip type Xc2v500. Three channels Radar signals′ DPC are realized at the same time in the system. A hardware share structure is proposed which can reduce the hardware resources. The block floating point arithmetic method to improve the precision is applied. Also through the method of parallelism, the computation speed is enhanced. It can complete the pulse compression of three channels with 512 points complex signal within 96.23μs.