FPGA在BESⅢ漂移室电荷测量中的应用

FPGA application in charge measurement of BES-Ⅲ drift chamber

介绍了BES 漂移室电荷测量插件的结构和设计思想,侧重介绍了如何用FPGA实现对FADC采样数据的预处理,包括数据的流水线缓存、动态地扣除台基、实时提取电荷量以及零数据压缩等功能的实现。

This paper describes the architecture and design considerations of multichannel charge measurement module for BESⅢ focusing on how to precessFADC raw data implemented by FPGA, including pipelining data buffer,dynamic base line value subtraction, reatime charge abstraction and zero suppression.