用ISP器件进行可编程数字钟逻辑电路设计的研究

Study of the design of programmability digital clock with ISP devices

采用自行研制的基于 ISP器件的数模两用仿真开发系统和 isp EXPERT设计软件 ,利用层次化管理混合输入方式设计的方法 ,实现了可编程数字钟逻辑电路的设计 .

How to design programmability digital clock by the mixed inputs method of hierarchical management is introduced. IspEXPERT software, digital logic and analog simulation development system, which has been researched on ISP devices, are used.