一种解决高速DAC转换毛刺的同步方法

New Sync Solution to Reduce Conversion Glitch for High Speed DAC

提出一种新的降低数模转换器DAC输出毛刺噪音的数字解决方案,可编程灵活性高,鲁棒性明显,无噪音引入到模拟部分;避免使用高频的同步时钟,对降低模拟系统功耗和噪音耦合,改善时钟馈通导致输出性能的下降有显著的好处,同时避免使用重构滤波器和跟踪保持运算放大器,所以没有输出的迟滞,从而降低面积和功耗,设计指标达到转换速率10MSPS,5 M带宽,转换电流2～3 m A,归化测量的毛刺能量为0. 4 p Vs。

New sync solution to reduce DAC glitch benefit for high speed DAC dynamic performance is disclosed that is digital solution, flexible, robust, no noise induce to analog part. Avoid using high frequency sync clock, which degrade the DAC analog power and output performance for noise couple and clock feed through reason. Avoid using Reconstruction Filter(RCF) and Track-and-Hold Amplifier(THA), no propagation delay, save power and size, reduce heterogenic cost. The conversion speed reaches to 10 MPS, 5 M band width and conversion current is about 2-3 mA,The measured glitch energy is 0.4 pVs.