3506PCM脉码的CPLD逻辑设计

CPLD-based 3506PCM system design.

文章介绍了用复杂可编程门阵列 (CPLD)实现 35 0 6PCM脉冲编码调制器的编码、解码、时序控制等功能。在MAX +PLUSII软件提供的设计环境下 ,采用Altera公司的EPM712 8STC10 0芯片设计了数控测井满贯系统35 0 6PCM脉冲编码调制器逻辑电路 ;通过软件的仿真验证 ,证明了所设计的电路达到了原电路的功能 ;完成了具体的硬件电路设计及 35 0 6PCM脉码编码调制器与整个满贯系统的联调。结果表明 :系统运行正常 ,达到原系统的设计目的和技术要求。

The properties of complex programmable logic device(CPLD) are briefly introduced. Two EPM7128STC100 devices are employed in real 3506PCM system designing. The software simulations verify the validness of the design. The final printed circuit is offered and tested by the use of the digital controlled well logging system, which shows that the design meets the technical requirements and can be directly used in the real system.