高速可逆位置计数器的研究与FPGA实现

Research on high speed reversible counter and FPGA accomplishment

对应用于位置控制系统中的高速8路16位可逆计数器进行了研究,论述了其工作原理,详细讨论了8路16位可逆计数电路及其可编程接口逻辑电路的设计方法,并应用EDA技术下载生成高速FPGA器件.实际应用证明,器件抗干扰能力强,计数准确.

This paper researches into high speed 8 channels 16 bits reversible counters in the position control system, discusses the working principle of reversible counters. Moreover, it provides the mode of designing the circuit of reversible counters and programmable interface logic in detail, and forms FPGA component by downloading with EDA.The results of simulation and application in the system show that the counter is good at antiinterference and accurate accounting.