用于通信ASIC的高速BiCMOS逻辑电路

The BiCMOS Logic Circuit for the High-speed Digital Communication System

提出了几种通信用BiCMOS逻辑门电路的实现方案.这些逻辑门均可在低电源电压(2.0~3.0 V)下,采用BiCMOS工艺和深亚微米技术精心设计及制作,并经过比较对其作出评价.分析和实验结果表明,所设计的电路不但具有确定的逻辑功能,而且具备高速、低耗、低电源电压和全摆幅的特性,因而完全适用于高速数字通信系统中.

A number of high performance BiCMOS logic gate circuits are proposed, which designed and made by the BiCMOS and submicron technologies, and simulated and comparatively evaluated. They are designed for the application of low supply voltage (2.0~3.0 V). The analysis and experiment results show that these circuits possess definitive logical functions and can work at high speed and full swing with low power supply voltage and low power dissipation; therefore, meet the requirements of the high-speed digital communication system.