一种新型抗功耗分析的电流平坦化电路有效性研究

The Effectiveness of a New Current Flattening Circuit as Countermeasure against Power Analysis

差分功耗分析是一种有效的密码芯片侧信道攻击方法,攻击者通过监测芯片的功耗曲线就可以分析出芯片内的密钥,对密码设备的安全性造成了严重威胁.为提高密码芯片抗功耗分析攻击的能力,本文提出了一种基于功耗平衡原理的新型电流平坦化电路,该电路独立于密码算法实现,不影响密码芯片的原有设计流程.电流平坦化电路增加了电路的可配置性控制电流,实现了平坦电流的分级灵活控制,减小了系统相对功耗,又能够灵活适配于具有不同峰值电流的密码芯片,使电流平坦化电路的应用变得更加灵活,增强了系统的鲁棒性.电流平坦化电路由可配置电流检测模块、可配置参考电压模块、电流补偿模块、基准电流模块、折叠共源共栅放大器、无源低通滤波器六部分组成.本文采用SMIC 65 nm CMOS工艺对电路进行了设计与实现,芯片核心电路面积0.071 mm^2,功耗小于5 mA.实测结果表明:该电路能在较宽的频率范围内有效工作,2.17 ns响应时间及时隐藏密码芯片的电流变化,平坦化电流值0-32 mA可配置调节,电源端的电流波动衰减可达96%.

Different power analysis is an effective way to the side channel analysis of the cryptographic chips, an attacker can analyze the key in the chip by monitoring the power consumption curve during the execution of their internal programs, which may pose a serious threat to the security of the cryptographic device. In order to improve the capability of anti-power analysis of cryptographic chips, a novel current flattening circuit based on power balance principle is proposed. The circuit is independent of the cryptographic algorithm and does not affect the original design flow of the cryptographic chip. The current flattening circuit increases the configurable circuit that controls current,the configurable current flattening circuit realizes the hierarchical and flexible control of the flattening current, reduces the relative power consumption of the system, adapts flexibly to the cryptographic chip with different current peak, and enhances the robustness of the system. The current flattening circuit contains six parts: configuration current detection module, configurable reference voltage module, current compensation module, reference current module, folded cascade amplifier and passive low-pass filter. In this paper, the circuit is designed under SMIC the 65 nm logic low leakage CMOS process, the core circuit layout area is 0.071 mm^2, the power consumption is less than 5 mA. The test results show that the circuit can work effectively over a wide frequency range, and the current change of the cryptographic chip can be hidden in time by the corresponding time of 2.17 ns. The flattened current value can be adjusted from 0 to 32 mA, and the decay rate of current fluctuation on the power supply can reach 96.2%.