摘要
提出了一种适用于 Viterbi算法的改进的近似平方算法——二阶近似算法 .该算法最大相对误差 ( m aximumrelative error,MRE)和平均相对误差 ( average relative error,ARE)都非常低 ,与最新报道相比 ,MRE和 ARE分别减小了 2 0 %和 70 %左右 .同时 ,在 0 .6 μm CMOS工艺条件下 ,实现了基于该算法的 7- bit平方器 ,其延时和晶体管数与最新报道相当 .
A modified approximate squaring algorithm,named as quadratic approximate algorithm,suitable for Viterbi algorithm is presented.The maximum relative error (MRE) and average relative error(ARE) of quadratic approximate algorithm are significantly improved by about 20% and 70%,respectively,comparing with the latest existing approach.Moreover,a 7-bit squaring function based on quadratic approximate algorithm is implemented using 0.6μm CMOS technology,and the timing delay and transistor counts are equivalent with the latest existing approach.
