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用于SDH STM-64光接收机的GaAs HBT限幅放大器 被引量:2

GaAs HBT Limiting Amplifier for SDH-64 Optical Receiver
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摘要 采用 2 μmGaAsHBT工艺实现了 10Gb/s的限幅放大器 .整个系统包括一级输入缓冲、三级放大、一级用于驱动 5 0Ω传输线的输出缓冲和失调电压补偿回路四个部分 .采用双电源供电 ,正电源为 3.3V ,负电源为 2V ,功耗为5 0 0mW .在输出电压幅度保持恒定 (单端峰峰值 30 0mV)的条件下 ,输入动态范围约为 38dB .芯片面积为 1.15× 0 .7mm2 . A 10 Gbit/s limiting amplifier is realized in a 2 μm GaAs HBT technology. The Whole circuit consists of an input buffer, three similar amplifier cells, an output buffer for driving 50 Ohm transmission lines and a pair of feedback networks for offset cancellation. At a positive supply voltage of 3.3 V and a negative supply voltage of-2 V, the power dissipation is 500 mW. The input dynamic range is about 38 dB with a constant output voltage swing(300 mVp-p). The chip area is 1.15 time 0.7 mm2.
出处 《电子学报》 EI CAS CSCD 北大核心 2003年第5期711-713,共3页 Acta Electronica Sinica
关键词 光接收机 限幅放大器 GaAsHBT工艺 Heterojunction bipolar transistors Limiters Semiconducting gallium arsenide Signal receivers
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