摘要
节拍器专用集成电路能够精确产生音乐节拍。它主要由控制模块和驱动模块组成,根据用户的不同要求,由控制模块精确计算节拍速率,并控制节拍的声音;驱动模块则动态驱动液晶,使节拍速率和节拍音符在显示屏上显示。不同于传统的单片机实现技术,该专用集成电路采用了先进的大规模集成电路EDA设计方法,用VHDL语言正向设计,FPGA下载实际验证。
A metronome ASIC was designed in the paper, which can engender time precisely The circuit consists of control and drive modules Depending on different demands of the user, the control module can precisely calculate the beat rate and control the sound of the beat, and the drive module can dynamically drive the LCD that displays the beat rate and the notes Unlike the traditional implementations, this paper implements the metronome ASIC with the advanced EDA design method for VLSI's, in which the circuit is designed with VHDL and validated in FPGA's
出处
《微电子学》
CAS
CSCD
北大核心
2003年第1期63-66,共4页
Microelectronics