基于SOC典型结构的系统验证环境

An IP Bus Based System Verification Environment for SOC Design

IP集成已经成为SOC的主要设计方法,但是IP间的不兼容性和冲突带来了SOC设计的大量问题。文章给出了一种基于IP总线的SOC标准架构,并在这一架构上建立了系统验证环境。该验证环境利用现有的EDA工具,并建立在广泛使用的IP重用规范之上,因此具有很强的可移植性。同时,该环境使激励文件也能与IP一起被SOC设计重用,大大减轻了系统验证的工作。该环境适用于SOC设计的各个阶段,并且具有软硬件协同仿真的能力。

As more and more IP's are incorporated into the design, challenges are increasing for verification of SOC's A system verification environment is described in the paper, which is based on VSI Alliance IP bus standard to identify the disparities between system modules The issue is to provide the possibility to access to a wellsuited environment that can be reused as part of the ongoing verification effort The environment also has the capacity of HW/SW cosimulation and can be used for systemlevel prototyping