期刊文献+

亚稳态处理模式和时基对准问题 被引量:4

Metastability Dealing Modes and Digital Time Alignment
下载PDF
导出
摘要 两个异步单元之间的联接、或是一个信号引入一与之异步的系统时,可能会引起亚稳态而导致故障。用同步器进行延迟是处理亚稳态的一个常见方法犤2犦犤6犦,该法是输出前先进行较长时间的等待。另一个必须提到的方法是“暂停时钟”法犤1犦犤2犦犤3犦犤4犦,即采样用的时钟是可暂停的。该文就这些亚稳态处理方法给出了一个统一的描述,引入了关联性概念来描述系统之间的联接,并提供了自动数字对时这一应用实例。另外,文章还指出选择亚稳态处理方法时应考虑具体应用场合。 Metastability failure may occur when a connection is needed between two asynchronous units,or a digital signal is sampled by another asynchronous system.A common way to treat metastability is making sufficient delay with a synchronizer before output .Another way which have to be mentioned here is“pausable clock”in which the sampling clock is pausable.In this paper,general descriptions are established for the metastability dealing methods discussed pre-viously,correlativity is introduced to characterize connections between systems ,and a practical application of automatic digital time alignment also presented.In addition,it is pointed out that application requirements should be considered when the selection for a way to solve metastability problem is being made.
出处 《计算机工程与应用》 CSCD 北大核心 2003年第18期108-110,共3页 Computer Engineering and Applications
关键词 主动系统 被动系统 标志位 关联性 亚稳态 initiative system,passive system,flag bit,correlativity,metastability
  • 相关文献

参考文献9

  • 1W S VanScheik,R F Tinder.High Speed Extemally Asynchronous/ Internally Clocked Systems[J].IEEE Trans Computers, 1997 ;46(7) : 824-829.
  • 2M Afghahi,C Svenssion.Performance of Synchronous and Asynchronous Schemes for VLSI Systems[J].IEEE Trans Computers,1992;41(7): 858-872.
  • 3F U Rosenberger,C E Monlar,T J Chaney et al.Q-Modules:Intemally Clocked Delay-Insensitive Modules[J].IEEE Trans Computers,1988- 37(9) : 1005-1018.
  • 4Allen E Sjogren,Chris J Myers.Interfacing Synchronous and Asynchronous Modules Within a High-Speed Pipeline[J].IEEE Trans VLSI Systems, 2000; 8 (5) :573-583.
  • 5D J Kinniment,J V Woods.Synchronization and Arbitration Circuits in Digital Systems[J].Proc IEE, 1976; 123(10) :961-966.
  • 6Jacqueline Walker,Antonio Cantoni.A New Synchronizer Design[J]. IEEE Trans Computers, 1996 ;45 ( 11 ) : 1308- 1311.
  • 7F Robin,G Privat,N Van Den Bossche.Functionally asynchronous array processor for morphological filtering of grey scale images[J].IEE Proc Comput Digit Tech, 1996; 143(5) ;273-281.
  • 8H R Simpson.New algorithms for asynchronous communication[J].IEE Proc Comput Digit Tech, 1997; 144(4) :227-231.
  • 9Chiu-sing Choy,Jan Butas,Juraj Povazanec et al.A New Control Circuit for Asynchronous Micropipelines[J].IEEE Trans Computers,2001; 50(9) :992-997.

同被引文献14

引证文献4

二级引证文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部