摘要
本文基于多值时序电路的次态方程和输出方程最小项展开式,提出了一种具有任意值输入、双轨二值输出的阈值存储电路设计方案,它和多值与或门配合,运用Disjoint代数能够设计出任意基数值时序电路.文中通过三值九进制计数器的设计,阐明了任意基数值时序电路的设计方法.
Based on next-state equation and output equation of MVL sequential circuits, a threshold memory circuit with arbitrary multivalued input and double-rail 2-valued outputs is proposed. Combined with MVL AND-OR gate, arbitrary multiyalued. sequential logic circuit can be designed by using Disjoint algebra. Its design methpl is shown by designing 3-valued counter.
出处
《计算机学报》
EI
CSCD
北大核心
1992年第1期67-71,共5页
Chinese Journal of Computers
基金
国家自然科学基金
关键词
阈值存储电路
时序逻辑
逻辑电路
Threshold memory circuit, arbitrary multivalued sequential logic, Disjoint algebra, threshold variable.
