行为功能级逻辑综合系统中的硬件综合方法

HARDWARE SYNTHESIS METHOD OF BEHAVIOR FUNCTION LEVEL LOGIC SYNTHESIS SYSTEM

本文讨论了在专家系统开发工具OPS5环境中,实现行为功能级逻辑综合系统中的硬件综合方法,以产生进行ASIC芯片版图设计的输入数据。

In this paper, hardware synthesis method of behavior function level logic synthesis system is presented. Under expert system developing tool OPS5 environment, this method is used to produce input data for designing ASIC chip layout.