摘要
大规模的可编程逻辑器件已经显著改变了数字系统的设计过程 ,并且 VHDL语言在设计中的作用也日益显著 .简要论述了关于 FPGA的 VHDL 设计中一些注意事项 ,提高电路描述的正确性 ,从而提高
Hign density PLD has changed the design process of digital system evidently, and VHDL is more and more important is the design process. This paper discusses some points of VHDL in FPGA to improve the validity of the circuit , and so we can improve the performance of the FPGA design.
出处
《小型微型计算机系统》
CSCD
北大核心
2003年第7期1194-1196,共3页
Journal of Chinese Computer Systems