摘要
As the traditional RISC+ASIC/ASSP approach for network processor design can not meet the today’s requirements, this paper described an alternate approach, Reconfigurable Processing Architecture, to boost the performance to ASIC level while reserve the programmability of the traditional RISC based system. This paper covers both the hardware architecture and the software development environment architecture.
As the traditional RISC+ASIC/ASSP approach for network processor design can not meet the today's requirements, this paper described an alternate approach, Reconfigurable Processing Architecture, to boost the performance to ASIC level while reserve the programmability of the traditional RISC based system. This paper covers both the hardware architecture and the software development environment architecture.
关键词
网络处理器
信息处理器
指令系统
RISC
ASIC
重配置处理器
运行配置
network processor
reconfigurable processor
run time reconfiguration
field programmable gate array (FPGA)
raduced instruction set circuit (RISC)
application specific integrated circuit(ASIC)
