运用遗传算法的深亚微米输出缓冲器优化设计方法

Optimal Design of Deep Submicron VLSI Buffer Using the Genetic Algorithm

分析了小尺寸效应对深亚微米器件性能的影响,结合输入输出耦合电容和漏极扩散层寄生电容对CMOS反相器延迟影响很大的特点,建立了小尺寸器件延时估算模型.采用变尺寸率反相器级连方法,建立了深亚微米输出缓冲器优化设计模型,并运用遗传算法建立了新的优化方法.该方法利用罚函数将小尺寸输出缓冲器优化问题转化为无约束问题,通过适应度函数设计和染色体编码,得到遗传优化结果,克服了传统方法处理非线性多变量问题时存在的效率降低等缺陷.SPICE仿真表明,应用新的深亚微米缓冲器设计模型及方法的优化结果与传统设计比较,延时减少了1个数量级以上,尺寸减小了30%以上,验证了新的深亚微米缓冲器设计模型及设计方法的可靠性.

The main effect on the performance of devices in the deep submicron region is analyzed. Considered the effect of input-output coupling capacitance and parasitic capacitance of drain-source layers on CMOS inverter, a deep submicron buffer design model is established. A new optimal method for buffer design is presented with the aid of the genetic algorithm. The optimal problem of small size buffer can be turned into an unconstrained one by introducing a punish function. The design of fitting degrees function and the chromosome code facilitate solving the optimal problem of delay of output buffer. The analytical model and method are proved satisfactory by SPICE simulation. Compared with the conventional fixed-taper buffer, the newly proposed output buffer can decrease the time delay and size of the proposed buffer by one order of magnitude and 30%, respectively.