用Skipjack算法构造跳频码的实现

Realization of FHCS Generator Using Skipjack

跳频码序列的性质直接影响着跳频通信的性能 ,计数式跳历 To D( Time of Day)跳频码序列的产生算法是对计数式 To D的分组加密变换。基于这种认识 ,提出了用分组加密 Skipjack算法来构成跳频码序列的产生算法 ,分析和测试表明所得的跳频码序列在均匀性、相关性、复杂性、游程和频隙滞留等方面都能满足跳频码序列的要求 ;在 FPGA上综合的结果说明 ,该算法是一个便于芯片实现的、可实用的跳频码发生器方案。

The properties of Frequency Hopping Code Sequences(FHCS) affect the performance of FH communication system. The generation arithmetic of FHCS with counting ToD is actually regarded as a process in which the ToD sequences are encoded by the block cipher. Based on analysis,this paper proposes that Skipjack algorithm can play the role of a block cipher. The test results of FHCS show that the sequences have good performance in uniformity,correlation,complexity,path length and frequency interval stays. The chip scheme is also realized in FPGA and may be used easily.