一种基于提升算法的小波滤波器硬件结构设计

The design of hardware architecture for lifting-based DWT/IDWT

基于提升方法提出了一种有效的双正交 (9- 7)小波滤波器的硬件实现结构 .采用流水线调度技术优化结构设计 ,其前向滤波器和后向滤波器的实现具有对称性 ,硬件实现方法简单 .采用VerilogHDL对系统设计进行了描述 ,进行了功能仿真 ,并选用Xilinx公司的xcv5 0e cs14 4 8在集成软件ISE4 .

The architecture for hardware implementation of biorthogonal (9-7) wavelet transform by lifting scheme was presented. The pipeline scheduling technique was adopted to optimize the architecture. The architecture of inverse discrete wavelet transform was similar to that of forward discrete wavelet transform. It simplified the system design. The design was described and simulated by Verilog HDL. It was synthesized and mapped by xcv50e cs144 8 under Xilinx′s ISE4.1 and the frequency of operation was 100?MHz.