死区时间对变流器频谱的影响及其CPLD实现

Influence of dead-zone time on converter voltage spectrum and its realization via CPLD

分析死区时间的长短对变流器输出电压频谱的影响,重点介绍了一种采用CPLD(复杂可编程逻辑器件)电路实现变流器脉冲分配功能的实例,阐述了其特点和功能,并以实测结果对仿真分析进行了验证。

This paper analyzes the influence of the dead-zone time on the output voltage spectrum of the con-verter.An example is given to show the realization of pulse distribution via CPLD(complicated programmable logic de-vice)cir cuit.Characteristics and functions are elab orated.Simulation analysis verifies the measured results.