摘要
在大规模的FPGA设计中,由于逻辑过于复杂,给仿真与调试工作带来很大难度。本文结合“实用化综合接入系统”边缘路由器子系统的设计,结合仿真软件提供的接口,提出用测试程序自动生成测试向量,自动完成仿真结果检查的方法,大大降低了仿真与调试的工作量。
For the complexity of logics in large-scale FPGA design, there抯 great difficulty in simulation. Taking the design of the edge router system as the example, a test program is proposed to auto-generate test vector and check the simulation result. Using this technology the workload of simulation is greatly reduced. Through the introduction of this design process, the auto-simulation technology in the digital communication system is well elucidated.
出处
《电路与系统学报》
CSCD
2003年第4期137-140,共4页
Journal of Circuits and Systems
基金
863通信主题重大课题:"实用化综合接入系统" (863-317-01-01-99 )