摘要
取指令能力的高低对微处理器的性能有很大影响 .指令预取技术能够有效地降低指令Cache的访问失效率 ,提高微处理器的取指令能力 ,进而提高微处理器的性能 .本文提出了一种基于程序控制流的混合指令预取机制 ,它采用顺序预取和非顺序预取相结合的方式将指令提前读入指令Cache .模拟结果显示 ,该方法能够有效地提高指令Cache访问的命中率 ,并具有实现简单 。
Instruction supply can influence processor performance greatly. Instruction prefetching is an effective mechanism to reduce instruction cache miss rate. It proposes an instruction prefetching mechanism based on program control flow graph, while sequential prefetch and non-sequential prefetch are both employed to fetch instructions in advance. Experimental results show it can increase instruction cache hit rate effectively. It predicts program behavior statically so that it does not need any complex hardware to predict and restore.
出处
《电子学报》
EI
CAS
CSCD
北大核心
2003年第8期1141-1144,共4页
Acta Electronica Sinica
基金
8 63高技术研究发展计划 (No .2 0 0 1AA1 1 1 0 50 )