基于RAM结构的CAM的VerilogHDL设计

Design of CAM Based on RAM Structure with Verilog HDL

该文介绍了以FPGA芯片中RAM结构为核心,使用VerilogHDL设计CAM的方案。该CAM的数据深度和宽度易于扩展,匹配查找速度快。

Implemented with Verilog HDL,a design of CAM based on RAM structure in FPGA is presented in this article.The feature of the design is flexible in expanding of depth and word-width in the CAM and rapid in matching process.