LVDS高速I/O接口电路设计

Design of LVDS high-speed I/O interface circuits

提出了一种用于传输高速数据的LVDS(LowVoltageDifferentialSignaling)驱动器及接收器的设计 .基于MOS管的大信号模型计算了电路的参数 ,根据TSMC(台积电 )的 0 .2 5 μmCMOS工艺模型 ,在Candence环境下用Spectre仿真器模拟 ,调整各个MOS管的宽长比 ,确定了电路各参数 .给出了驱动器和接收器互连的仿真结果 ,仿真结果表明该LVDS驱动器和接收器能稳定工作在 1GHz的工作频率下 ,LVDS高速I/O接口电路能使计算机之间、芯片之间的数据传输带宽达到Gbit/s级 .

The design of LVDS (Low Voltage Differential Signaling) driver and receiver used to transmit high speed data between chips was presented. The circuits′ parameters were induced with the large signal model of MOS transistor. Those parameters were modified and decided after the circuits were simulated with the 0.25?μm CMOS technology model of TSMC. The simulator was Spectre in the environment of Cadence. The driver and receiver were linked and simulated. The simulation results showed that the driver and receiver could work stably under the frequency of 1?GHz. Gbps data band between computers and chips was realized in LVDS I/O interface. It has promising application perspective.