IP软核的VHDL设计与复用方法研究

A Study of Design and Reuse Methods for IP Softcore Based on VHDL

随着超大规模集成电路技术的不断发展 ,集成电路的集成度越来越高 ,片上系统 ( So C)的规模越来越大 ,因此片上系统的设计变得越来越复杂 .由于采用 IP核复用技术可以简化多功能芯片的设计 ,开发 IP核成为当前片上系统的重要设计手段 .文中重点描述了 IP核的设计技术 ,并以IIC( I2 C)总线控制器 IP核为例说明 IP软核的设计方法 ,包括有限状态机的应用 .最后通过复用I2 C和 RISC体系结构的 8位微控制器的 IP核 ,构建了一个 So C系统 ,由此来分析和研究复用技术 .

With the technique development of the VLSI, the degree of integration and the scale of SoC(Systems On a Chip)have been greatly increased. The design of SoC is becoming more and more complicated. Because of the application of IP reuse technique, the design of chip can be simplified. In order to implement more and more complex systems on a chip, designers increasingly relay on the resource of Intellectual Property (IP) cores. This paper refers to design of IP softcore. And taking IIC controller as an example, the design of a programmable interface IP softcore is studied mainly. In the design process of IP softcore finite state machine is involved. At last by reusing I 2C and 8 bit microprocessor of RISC structure a kind of SoC is integrated so as to introduce how to integrate various IP into SoC.