摘要
在基于面积最优化的考虑下,对RSA加解密算法进行了分析,对大整数的指数和求模运算进行了分解,并对最大数据长度为256位的RSA算法进行了版图设计。经仿真模拟测试,该芯片功能符合RSA公开密钥算法的要求。与其它实现RSA公开密钥算法的专用集成电路相比,该电路具有运算部件少、面积小的特点。
Based on area optimization, the RSA publickey algorithm is analyzed and the exponent and modulus operations of large integers are optimized in the paper An RSA encryption device is designed to perform 256bit encryption on a serial data stream Simulation on the design shows that the logic function of the device is in accordance with the RSA publickey algorithm Compared with other ASIC's, this design involves fewer operation units and has less area costs
出处
《微电子学》
CAS
CSCD
北大核心
2003年第5期373-376,共4页
Microelectronics
基金
国家"863"高技术研究发展计划资助(20011AA141040)