期刊文献+

SOC测试中BIST的若干思考 被引量:5

To Discuss the BIST in SOC Test
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摘要 文章简述SOC测试中BIST的优势,结合SOC设计与测试的相关标准,探讨BIST的发展。 The advantage of BIST in SOC test is described in this paper.Combined with the standards of SOC design and test,we discussed the BIST in the future.
出处 《微电子学与计算机》 CSCD 北大核心 2003年第10期41-44,47,共5页 Microelectronics & Computer
基金 国家自然科学基金资助项目(60106004)
关键词 SOC 测试 BIST 集成电路 设计 数字电路 模拟电路 IP(Intellectual Property),SOC(System-on-a-Chip),BIST(Build-in-self-Test),OCP(Open Core Protocol)
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参考文献9

  • 1工研院/系统芯片技术中心.数字逻辑电路之内建式自我测试.http://www.taiwansoc.org/,2002.
  • 2工研院/系统芯片技术中心.国际测试标准IEEE P1500简介.http://www.taiwansoc.org/,2002.
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同被引文献27

  • 1刘建都,张安堂.CMOS存储器中地址译码器的开路故障及测试[J].空军工程大学学报(自然科学版),2000,1(2):78-81. 被引量:4
  • 2杜俊,赵元富.VLSI可测性设计研究[J].微电子学与计算机,2004,21(10):189-192. 被引量:7
  • 3刘建都.CMOS存贮单元的开路故障可测性设计[J].微电子技术,1994,22(2):10-14. 被引量:1
  • 4方祥圣,曹先霞.系统芯片SOC的BIST测试研究[J].安徽建筑工业学院学报(自然科学版),2006,14(3):59-61. 被引量:1
  • 5Le Jin, Chengming He. Fast implementation of a linearity test approach for high resolution ADCs using non- linear ramp signals[C]//IEEE 2004 International Symposium on Circuits and Systems. USA: State University, 2004.
  • 6Dominique Dallet, Jose Machado da Silva. Dynamic characterization of analog to digital converters [ M]. Berlin: Springer- Verlag Press, 2005.
  • 7Michael F, Toner, Gordon W Roberts. On the practical implementation of mixed analog- digital BIST[C]//IEEE 1995 Custom Integrated Circuits Conference. USA, Santa Clare, 1995 : 525 - 528.
  • 8Michael F Toner, Gordon W Roberts. A BIST schenae for a SN-R, gain tracking, and frequency response test of a sigma- delta ADC[J]. IEEE Transactions on circuit and systems II: Analog and digital signal processing, 1995, 42 (1):1-15.
  • 9Arabi K, Kaminska B. Oscillation built - In self- test(O- BIST) scheme for functional and structural testing of analog and mixed- signal integrated circuits[ C]// International Test Conference. USA, Washington, 1997:786 - 795.
  • 10Evan M Hawrysh, Gordon W Roberts. An integration of memory- based analog signal generation into current DFT architectures [ J ]. IEEE Transactions on Instrumentation and Measurement, 1998,47(3) :748 - 759.

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