摘要
A 2 5GHz fully integrated LC VCO is fabricated in a standard single poly 4 metal 0 35μm digital CMOS process,using a complementary cross coupled topology for lowering power dissipation and reducing the effect of 1/ f noise.An on chip LC filtering technique is used to lower the high frequency noise.Accumulation varactors are used to widen frequency tuning.The measured tuning range is 23 percent.A single hexadecagon symmetric on chip spiral is used with grounded shield pattern to reduce the chip area and maximize the quality factor.A phase noise of -118dBc/Hz at 1MHz offset is measured.The power dissipation is 4mA at V DD =3 3V.
用 0 .35μm、一层多晶、四层金属、3.3V的标准全数字 CMOS工艺设计了一个全集成的 2 .5 GHz L C VCO,电路采用全差分互补负跨导结构以降低电路功耗和减少器件 1/ f噪声的影响 .为了减少高频噪声的影响 ,采用了在片 L C滤波技术 .可变电容采用增强型 MOS可变电容 ,取得了 2 3%的频率调节范围 .采用单个 16边形的对称片上螺旋电感 ,并在电感下加接地屏蔽层 ,从而减少芯片面积 ,优化 Q值 .取得了在离中心频率 1MHz处 - 118d Bc/ Hz的相位噪声性能 .电源电压为 3.3V时的功耗为 4 m A.
基金
国家高技术研究发展计划资助项目(编号 :2 0 0 2 AA1Z10 60 )~~
