消息基VXI总线接口逻辑的模块化实现

Modularized implementation of message-based VXI bus interface logic

VXI总线是一种在自动测试领域及其他多机互连系统中广泛应用的消息总线协议。文中分析了VXI总线协议的特点 ,根据该协议提供的通讯规范的可裁剪特征提出了模块化的VXI总线接口逻辑实现方法。并以此为基础在FPGA中实现了模块化的消息基VXI总线接口逻辑。通过模块化设计大大提高了设计的可继承性。为检验设计的可靠性和有效性 ,给出了FPGA设计生成的模拟时序 ,并将该设计应用于一种多DSP实时图像处理系统 ,使之能满足系统资源管理和各模块间的简单消息传递的需要。最后给出了实际测量的总线时序图 ,结果表明提出的设计方法和实现使VXI接口逻辑在模块化设计的同时也实现了协议所提供的总线带宽。

VXI bus is a protocol being widely used in auto-testing and other multi-instruments system. In this paper, the characteristics of the protocol are analyzed, and a modularizing approach is proposed based on its ability of tailoring. On the basis of this, a modularized message-based VXI bus interface logic is implemented in FPGA. The design heritability is enhanced greatly. To prove the reliability and validity of the approach, the simulated timing diagrams generated by FPGA are presented. It is used in a multi-DSPs real-time image processing system, in which the VXI bus interface logic is used for system resource management and simple message interaction between modules. At the end of the paper, a real tested bus timing diagrams are presented to prove that the proposed approach and its implementation can provide satisfying bus bandwidth.