基于iSLIP算法的高速Crossbar调度器的FPGA设计与实现

FPGA Design and Implementation of High-speed Crossbar Switch Scheduler Based on iSLIP

首先介绍了一种公平、有效的交叉矩阵调度算法—— i SLIP算法 ,接着提出了基于 i SLIP算法的调度器的 FPGA(Field Programmable Gate Array)实现 ,并针对调度器的核心部件——可编程优先级编码器 ,介绍了 4种设计方案 ,用 Xilinx公司的 Spartan- S1 0 PC84- 3 FPGA芯片实现。对实现结果的数据分析表明 ,采用温度计编码型 PPE的调度器更适用于构建高速、大容量交换网络。

In this paper,a fair and high performance crossbar scheduling algorithm: i SLIP algorithm is introduced first.Then FPGA (Field Programmable Gate Array) design and implementation of scheduler based on i SLIP is presented.With programmable priority encoders,the key components in the scheduler,as the targets,four PPE design solutions are described and they are implemented by Xilinx's FPGA Spartan S10PC84 3.It is shown by the analysis of data that schedulers using thermometer encoding PPE are suitable to build high speed and large capacity switch fabric.