5Gb/s 0.25μm CMOS限幅放大器(英文)

5Gb/s 0.25μm CMOS Limiting Amplifier

采用 TSMC 0 .2 5μm CMOS技术设计实现了高速低功耗光纤通信用限幅放大器 .该放大器采用有源电感负载技术和放大器直接耦合技术以提高增益 ,拓展带宽 ,降低功耗并保持了良好的噪声性能 .电路采用 3.3V单电源供电 ,电路增益可达 5 0 d B,输入动态范围小于 5 m Vpp,最高工作速率可达 7Gb/ s,均方根抖动小于 0 .0 3UI.此外核心电路功耗小于 4 0 m W,芯片面积仅为 0 .70 mm× 0 .70 m m.可满足 2 .5 ,3.12 5和 5 Gb/ s三个速率级的光纤通信系统的要求 .

A limiting amplifier (LA) IC implemented in TSMC standard 0.25μm CMOS technology is described.Active inductor loads and direct-coupled technology are employed to increase the gain,broaden the bandwidth,reduce the power dissipation,and keep a tolerable noise performance.Under a 3.3V supply voltage,the LA core achieves a gain of 50-dB with a power consumption below 40mW.The measured input sensitivity of the amplifier is better than 5m V _ pp .It can operate at bit rates up to 7Gb/s with an rms jitter of 0.03 UI or less.The chip area is only 0.70mm×0.70mm.According to the measurement results,this IC is expected to work at the standard bit rate levels of 2.5,3.125,and 5Gb/s.