基于FPGA的汽车转速表校验仪的设计

The design of Car speed meter calibrator based on FPGA

本设计根据直接频率合成器DDS的工作原理,在FPGA内部实现模拟汽车转速传感器输出信号,然后利用该信号驱动汽车转速表实际值的显示,最后再通过与转速理论计算值比较来完成对汽车转速表校验。该设计核心模块是脉冲产生模块,利用FPGA自身的技术优势,运用科学先进算法来完成此模块。以此来达到比基于单片机的传统转速校验仪更优的性能。

This design is based on the working principle of direct digital synthesizer,firstly,to make a simulation about the output signal of vehicle speed sensor inside the FPGA,then use the signal to drive the car tachometer actual value display,finally,by comparing the theoretical values of speed to complete car speed meter calibration.The design of the core module is a pulse generator module, using FPGA own technological advantages,through the advanced scientific algorithms to complete this module.In this case,it can achieve better performance than the traditional speed calibrator which base on the MCU.