低功耗MPEG2解码电路的新VLSI结构研究

A New Power Efficient VLSI Architecture in MPEG2 Decoder

MPEG2动态图像压缩解码电路中最关键的部分逆离散余弦变换 ( IDCT)模块是该研究领域的热点。文中提出了一种基于 forward- mapping算法的 IDCT VLSI结构 ,针对实际运用中 IDCT变换对象 DCT系数的值为零的比例较高的情况 ,采用以累加器为主的运算阵列 ,利用简单的控制电路解决了多余计算能耗的问题 ,适合低功耗要求的 MPEG2解码器件 。

Inversed discret e cosine transform(IDCT)module is the mos t important part in a MPEG2 decoder chip .An IDCT VLSI architecture based on forw ard mapping is presented in this paper.I n view of the fact that there's high per centage of zero valued DCT coefficients, we designed an IDCT structure with a ope rating array based on accumulators.With simple control unit it can be a power ef ficient device with wide application in multi media digital communications.