摘要
介绍了利用TSMC 0.18μm CMON工艺设计的应用于SDH STM-64速率级(10Gb/s)光接收机前端放大电路。该电路由前置放大器和作为主放大器的限幅放大器构成,其中前置放大器采用RGC形式的互阻放大器实现,限幅放大器采用改进的Cherry—Hooper结构。模拟结果表明该电路可以工作在10Gb/s速率上。
A 10Gb/s front-end amplifier for SDH STM-64 optical receiver is realized in a 0.18um CMOS technology. It consists of a transimpedance amplifier and a limiting amplifier as the main amplifier. The RGC (regulated cascade) techniques are applied in the transimpedance amplifier and a modified Cherry-Hooper architecture is employed in limiting amplifier. Simulated results show that the amplifier can operate at the bit rate of 10Gb/s.
出处
《光通信技术》
CSCD
北大核心
2003年第12期44-46,共3页
Optical Communication Technology
基金
国家863项目(编号:2001AA312010
2001AA312060)资助
