2.2MHz,8.3mW多位量化连续时间Sigma-Delta调制器设计

A2.2 MHz,8.3 mW Multi-bit Continuous-Time Sigma-Delta Modulator

本设计完成了一款2.2MHz、8.3mW连续时间Sigma-delta调制器,可应用于无线通信领域.与传统的离散结构相比,连续结构在实现兆赫兹以上带宽的同时,显著降低了功耗,并且在低电源电压下也有很好的发展潜力.此Sigma-delta调制器采用前馈单环三阶四位量化结构,考虑了非零环路延时效应,设计了补偿网络.在标准0.18μm CMOS工艺下,完成了调制器电路的设计.经过Cadence Spectre仿真验证,调制器的信号带宽为2.2MHz,动态范围为69dB,在1.8V电源电压下,电路总功耗仅为8.3mW.

A 2.2 MHz,8.3 mW continuous-time Sigma-delta(CT Σ-Δ)modulator is designed,which targets wireless communication applications.Compared with traditional discrete-time(DT)Σ-Δ modulators,CT counterparts achieve high bandwidth,low power and a considerable potential with lower power supply.A singleloop feed-forward third-order CTΣ-Δmodulator with an internal 4-bit quantizer is designed with the standard 0.18μm CMOS process.A compensation for the excess loop delay is implemented in the CTΣ-Δmodulator.It achieves69 dB dynamic range within a 2.2MHz bandwidth,while dissipating only 8.3mW from 1.8Vsupply.