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采用UVM方法学实现验证的可重用与自动化 被引量:13

Adopting Universal Verification Methodology to Achieve Reusability and Automation Verification
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摘要 在分析UVM的基础上,重点研究了验证的可重用与自动化实现方法.重用体现在验证组件的横向、纵向重用实现和验证场景的继承、组合重用实现.自动化实现依赖平台构建时的Field-Automation机制、脚本控制的RAL模型生成以及平台运行时的仿真结果实时在线比对等.最后,以PCI Express Controller的验证工作为例,说明了如何以自动化和重用性方法为指导,快速构建结构化的UVM验证平台,实施功能验证.验证结果表明,基于自动化与可重用的验证方法能够显著提升验证效率. Based on the analysis on UVM , this paper focuses on the implementation method of reusability and automation .The reusability is reflected by the horizontal and vertical reuse of verification components and the inheritance and combined reuse of verification scenarios . Automation implementation relies on Field-Automation mechanism ,script-controlled RAL model generation at platform constructing phase and the simulation results real-time compare online at platform running phase .Finally ,the PCI Express Controller verification has been completed to illustrate the method of building the structured UVM verification platform rapidly guided by automate and reuse approach .Verification results show that the automation and reusability implementation method can significantly improve verification efficiency .
出处 《微电子学与计算机》 CSCD 北大核心 2014年第11期14-17,22,共5页 Microelectronics & Computer
关键词 UVM 自动化 可重用 验证组件 Field-Automation机制 UVM automation reusable verification component field-automation mechanism
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  • 1董杨鑫,郑建宏.基于断言的SoC设计验证方法[J].电子测试,2007,18(9):52-55. 被引量:2
  • 2Announcing the Advanced Encrypyion Stadndard[s] FZPS-PVB-197 Federal Information Processing Standards Publication. 2001.
  • 3Accdlera. Universal verification methodology 1.1 us- ers guide[M]. Cadence Design Systems Inc. , Mentor Graphics Corp. , Synopsys Inc. , 2011,5:2.
  • 4Accdlera. Universal verification methodology 1.1 class reference[M]. Cadence Design Systems Inc. , Mentor Graphics Corp. , Synopsys Inc. , 2011,6:342.
  • 5Sharon Rosenberg. A practical guide to adopting the universal verification methodology [M]. Cadence De- sign Systems Inc. , 2010,5:9.
  • 6Chris Spear. System Verilog for Verification[M]. Synopsys Inc. , 2008:5.
  • 7Qiu Li, Feng Dong-qin. of EPA Chip. [C]// Proc. on Electric Information (ICEICE) 2011.[S.l.]:IEEE Functional Verification International Conference and Control Engineering Press, 2011:1-5.
  • 8陈皓.跟我一起写Makefile.[EB/OL].[2012-06-18].http://www.Cublog.cn/u/19881/upfile/060718103303.pal.
  • 9Carl Pixley, Aruna Chittor, Fred Meyer. Functional Verification 2003:Technology, Tools and Methodology. [C]// Proc. ASIC, 2003. [S. l. ] :IEEE Press, 2003: 1-5.
  • 10Randal L. Scbwartz, Tom Pboenix. Perl语言入门[M].南京:东南大学出版社,2009.

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