一种协处理器微程序控制器的设计

An approach to the design of microprogram controller for coprocessor

在协处理器中,微程序控制器的微码控制是协处理器指令译码的控制核心。文章提出一种协处理器微程序控制器的设计方法,并给出其功能验证的测试平台。采用隐含下址编码、流水及预译码等设计技术,来提高微码的执行效率。经优化的设计具有较快的译码速度和较小的微控制存储器面积。采用该方法设计的微程序控制器已经嵌入协处理器中,并且流片测试成功。

The executing of the microcode function of the microprogram controller is very crucial to the instructions decoder in the coprocessor. In this paper,an approach to the design of the microprogram controller for coprocessor is proposed and a test bench is given to verify the function of the presented microprogram controller. Some design techniques are applied for improving the executing efficiency of microcode such as hidden addressing,pipeline,predecoder and so on. The optimized design is characterized by faster decoder and smaller area of controlling memory. The designed block has been embedded in the coprocessor, and the product test is successful.