一种新颖的双端口数据高速缓冲存储器

Design of a Novel Dual-Port Data Cache

VLIW体系结构是媒体处理器的首选技术。解决处理器内核与访存之间的数据瓶颈,可以采用双Load/Store单元。为此,需要开发具有双端口访问能力的数据高速缓冲存储器。通过分析双端口情况下的系统工作时序、缺失(miss)处理和替换算法,设计并实现了一个4路组相连、容量为16kB的双端口数据高速缓冲存储器。通过在高速缓冲存储器内使用双端口SRAM,使其具有真正双端口并行访问能力,提高了处理器内核的数据吞吐能力。

VLIW is the first choice for media processor. Dual load/store units can be used to tackle the bottleneck between the processor core and the memory system. A novel dual-port data cache is presented in the paper,and the system timing,miss processing and replace policy are analyzed in particular. With the utilization of dual-port SRAM,the data cache is dual ported to allow two accesses to proceed in parallel.