FPGA布线开关的电路设计

Circuit Design of FPGA Routing Switches

在分析隔离岛式FPGA布线结构的基础上,设计了导通晶体管布线开关和三态缓冲布线开关。设计了级恢复电路,解决了导通晶体管开关引起的静态功耗问题。提出了基于扇入的三态缓冲开关bufm,避免了一般缓冲开关的扇出问题。最后,我们对各种布线开关的延时特性作了比较,提出了一些合理的建议。

This paper examines circuit design of pass transistor and tri-state buffer routing switches in island-style FPGAs. A level-restoring circuit was designed to solve the static power dissipation problem. A new fan-in based switch bufm was presented which had no fan out problem. Finally, comparison between these routing switches was done and some reasonable advices were made.