CADENCE系统上Timing-Driven设计流程探讨

Study on the Time-Driven Design Flow Based on Cadence System

本文首先介绍了亚微米领域集成电路中的寄生参数选取模型 ,然后给出了一种称之为时序驱动的设计流程 ,并对其中的关键步骤和工具作了简要介绍 ,着重介绍了布局布线工具SE中的时序驱动设计方法 。

First, the extract model of parasitic parameter in sub-micron area ICs is introduced in this paper. Then, a timing-driven design flow is given, and some critical steps and tools are briefly introduced. The emphasis introduced is timing-driven design method in place and route tools “Silicon Ensemble”. At last, how to build unit timing library is presented in brief.