低开销多标准8×8离散余弦变换设计

Low cost 8×8 Discrete Cosine Transform core for multiple video codec

针对现有的多种视频标准,在总结分解后矩阵的共同特点的基础上,定制实现了一种资源共享结构。该结构通过定制实现处理单元、蝶形变换网络和转置,实现了附带有"阶流水"结构的高效率计算结构。实验结果显示,本文所提出的结构,除了能够在低开销的前提下支持现有的视频标准H.264、视窗媒体视频(VC-1)、音视频编码标准(AVS)和高效视频编码(HEVC)之外,还能够对格式为4:2:0的Full-HD和宽四叉扩展图形阵列(WQXGA)的视频序列进行实时处理。通过在0.13μm工艺下的综合实现,相比于现有的设计,本文所提出的设计逻辑资源开销下降近44%,功耗减小近20%。

Based on the common features of the factorized matrices, a hardware sharing architecture for multiple standards video codec is proposed. By customizing the processing element, butterfly network and transpose hardware, the proposed architecture constructs an efficient phase-pipelined hardware architecture. The proposed architecture can not only be generally used to compute 8×8 Discrete Cosine Transform(DCT) of Audio Video Coding Standard(AVS), H.264, VC-1 and High Efficiency Video Coding(HEVC) in a low cost way, but also can be used to decode Full-HD and Wide Quad extended Graphics Array(WQXGA) format video sequences in real time. The design has been synthesized in 0.13 μm technology. The synthesis results show that the proposed architecture achieves 44% reduction in gate count, 20% decrease in power consumption in comparison with other existing designs.