摘要
文章结合8位微控制器IP软核的设计,分析了指令系统的功能与特点,在算法级上对其处理器中数据路径进行了合理的调整与优化,并提出一种将ALU与移位逻辑并行设计的方法。较之于传统的串行设计方法而言,这种并行设计方法不仅描述简单,而且综合得到的电路降低了功耗,具有更快的运算速度,同时并不增加资源消耗。
Combining with the design of IP soft-core for 8-bit MCUs,this paper makes some adjustments and optimization to the data-path at the algorithm level after analyzing the functions and characteristics of the instruction system, and proposes a parallel design methodology of ALU and shift logic. Comparing with the conventional serial design methodology, this parallel design methodology is simple to describe, whereas the synthesized circuits consume less power and are faster without increasing resource consumption.
出处
《计算机工程与科学》
CSCD
2004年第1期95-98,共4页
Computer Engineering & Science