摘要
文章从SoC设计方法学的角度,讨论了基于SoC平台的数字视频处理IP的互连问题,并提出数字视频处理的数据总线和控制配置总线分离、同步的总线互连策略。同时,讨论了嵌入式专用视频处理在线配置的串行总线接口模块的设计,并针对视频处理参数配置的特点,提出了基于视频信号和系统时钟的双重同步结构。该设计已成功地应用于数字化处理电视芯片。
This paper addresses a novel synchronal structure and interconnection of buses within a digital video processing system. The system-interconnected buses are divided into two classes: the video data flow bus; parameter configuration and control bus. Meanwhile, the online configuration, adopted serial bus interface IP design, for the video processing is also proposed. The design has been successfully implemented into IC of digital processing TV.
出处
《微电子学与计算机》
CSCD
北大核心
2003年第12期85-88,共4页
Microelectronics & Computer
基金
国家863计划项目(863-SOC-Y-2-1-4)
