从噪声环境中提取信号的数字锁相和平均法

The Digital Lock-in and Averaging Techniques for Recorving a Signal from Interfering Noise

本文叙述采取数字锁相和平均法的一种弱信号检测实验系统。系统由微计算机和接口电路组成,可对被调制的慢变化信号作同步检测。其同步移相控制由微处理器自动产生,相敏检波(PSD)的功能由V/F转换结构(VFC和计数门)来执行,低通滤波(LPF)的作用由计数器与实时平滑处理来实现。从而可恢复掩没在非相干噪声中的单次信号,并取得肯定的S/N改善。对重复信号,则可采取多次累加和事后平滑处理的办法来进一步抑制噪声、取得良好的检测结果。本文给出采用这一综合技术所获得的S/N改善的典型实验结果。

A weak signal detection system with digital lock-in and averaging will be described in this article. The system is consisted of a microcomputer and some interface circuits. Itcan be used to delect a modulated slow-changing mono-cycle signal synchron-ously. Its synchronous phase-shift function is produced by microcomputer auto-matically, the VFC and counter-gate act as a PSD, and fhe counter combin-ing with real time processing of smoothing act as the LPF. For the repeated signal, the noise can be reduced further by accumulatingmany times, and the post-processing of smoothing. The typical results illustrating the improvement in S/N ratio with thesetechniques will be shown.