位片式高速FFT信号处理机设计

A Design of High-speed FFT Signal Processor

使用AM2900系列位片微处理器和TDC-1010 J 高速乘加器构成高速FFT 信号处理机。1024点实数功率谱计算时间为5毫秒。输出16(或32)比特。采用基4、C-T 算法。实信号用ODFT 算法。块浮点运算格式。微程序为模块化结构。微指令有80个操作位。A/D 最高采样频率200 kHz。可做为主计算机的协处理机或独立使用。

A high-speed FFT signal prcessor,which provides various fun-ctions,has been developed.The computation time for 1024 point real powerspectrum and the maximum sampling frequency are designed to be 5 ms and200KC respectively.Base4 or Base-(4+2) CT FFT algorithm and blockfloating-point arithmetic are adopted.A direct methed for preventing theoverflow is carried out by hardware.Bit bipolsr AM 2900 family,a high-speedmultiplier TDC-1010 j and RAM 2114,2147 are used in the processor.Themicroprogramming is modular;specific software module can be seleced to suitthe requirement of an application.Microcomputer MZ-80 B,MZ-3541 areavailable to the processor.